Electrical computers and digital data processing systems: input/ – Input/output data processing – Transfer termination
Reexamination Certificate
2011-03-22
2011-03-22
Hafiz, Tariq (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Transfer termination
C710S004000, C710S009000, C710S015000, C710S018000, C710S019000, C710S022000, C710S026000, C710S028000, C710S305000, C710S308000, C710S317000
Reexamination Certificate
active
07912998
ABSTRACT:
Methods and systems for performing direct memory access (DMA) transfers are described. An invalidate queue (or other storage device) contains an entry associated with a DMA transfer in progress. If the invalidate queue detects an invalidation of a memory page associated with that entry, then it is marked invalid. If the entry is marked invalid during the DMA transfer, then that DMA transfer is aborted. This enables, among other things, DMA transfers to unpinned virtual memory.
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Collard Jean-Francois
Oertli Erwin
Schlansker Michael Steven
Hafiz Tariq
Hewlett--Packard Development Company, L.P.
Vidwan Jasjit S
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