Diver circuit for 3.3v I/O buffer using 1.9v fabrication process

Details Diver circuit for 3.3v I/O buffer using 1.9v fabrication process Diver circuit for 3.3v I/O buffer using 1.9v fabrication process

1998-01-28

2000-05-02

Tokar, Michael

Electronic digital logic circuitry

Interface

Supply voltage level shifting

326 80, 326 68, H03K 190175

Patent

active

06057710&

ABSTRACT:
A circuit for controlling a voltage provided to a switching transistor in a voltage conversion buffer which drives a high voltage output with low voltage transistors. The circuit has two elements to it. First, a pull-up circuit pulls the gate of the switching transistor to a high voltage level in response to a first state of a control logic signal. Second, a pull-down circuit pulls the gate of the switching transistor down to an intermediate voltage in response to a second state of the control logic signal. The intermediate voltage is set to be less than the high voltage by no more than approximately the low voltage amount.

REFERENCES:
patent: 5537059 (1996-07-01), Asahina
"Dynamic Dielectric Protection For I/O Circuits Fabricated in a 2.5V CMOS Technology Interfacing to a 3.3V LVTTL Bus", John Connor et al., 1997 Symposium on VLSI Circuits Digest of Technical Papers.

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