Static information storage and retrieval – Systems using particular element – Ferroelectric
Reexamination Certificate
2001-12-03
2002-12-24
Lam, David (Department: 2818)
Static information storage and retrieval
Systems using particular element
Ferroelectric
C365S065000, C365S236000
Reexamination Certificate
active
06498746
ABSTRACT:
BACKGROUND
1. Field
This disclosure relates to ferroelectric memory arrays, more particularly to methods for managing the polarity properties in the ferroelectric memory array.
2. Background
Ferroelectric memories are typically comprised of a material having ferroelectric properties sandwiched between layers of electrodes. The electrodes are typically arranged in an x-y grid, with each cell of the array being located at the points in the ferroelectric materials where the x and y lines cross over each other. The data bit stored in each cell has a value determined by the polarity of the ferroelectric material at that point. The polarity is controlled by application of voltages on the x and y lines. Typically, the x lines are referred to as word lines and the y lines are referred to as bit lines.
These memory arrays are relatively simple to manufacture, as they only involve two layers of metal and some ferroelectric layer sandwiched between. They typically have high density. Disadvantages lie in the nature of the extraction of data as well as the writing of data to the array. Both of these operations are slow. Reads are destructive and therefore require the data be rewritten to the array. Similarly, in order to write to the array, the array must be cleared. Reading the array with no regard for the output effectively clears the array prior to write operations.
Write operations and read operations are normally accomplished by applying voltages to the word line and bit line of the cell. For example, a read operation may apply a positive voltage from the active word line to the active bit line for a particular cell, and a write operation may apply a negative voltage. After the operation ends, the cell typically returns to its quiescent state with the voltage representing the data value for the bit stored there. Read and write operations disturb the polarity of the cell. If that cell receives a large number of read operations without any write operations, the cell may not return to the proper voltages for that data value but will become slightly disturbed in a particular direction, either positive or negative. The cell has developed a memory, similar to metal fatigue in mechanical devices, also referred to as history dependence.
In order to extend the longevity of ferroelectric memory arrays, then, some form of correction must be instituted that corrects the voltages for the cells without upsetting the actual data value stored in that cell.
REFERENCES:
patent: 5953245 (1999-09-01), Nishimura
Lam David
Marger Johnson & McCollom PC
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