Distributed memory module cache

Details Distributed memory module cache Distributed memory module cache

2005-08-30

2005-08-30

Anderson, Matthew D. (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S118000, C711S127000, C711S128000, C711S141000, C711S142000, C711S143000, C711S145000, C711S147000, C711S148000, C711S149000, C711S003000, C711S005000, C711S100000, C711S105000

Reexamination Certificate

active

06938129

ABSTRACT:
One embodiment of a distributed memory module cache includes tag memory and associated logic implemented at the memory controller end of a memory channel. The memory controller is coupled to at least one memory module by way of a point-to-point interface. The data cache and associated logic are located in one or more buffer components on each of the memory modules.

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