Distributed loop components

Static information storage and retrieval – Read/write circuit – Signals

Reexamination Certificate

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C365S233100, C331S143000

Reexamination Certificate

active

10833966

ABSTRACT:
In some embodiments, a chip includes a chip interface to accept a delay control signal from outside the chip. The chip also includes a controllable delay line to delay an input signal responsive to the delay control signal to provide an output signal with a particular phase relationship to the input signal. Other embodiments are described and claimed.

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PCT International Search Report, PCT/US2005/012075 (P18725PCT).
PCT Written Opinion of International Searching Authority PCT/US2005/012075 (P18725PCT).

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