Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-05-23
2006-05-23
Whitmore, Stacy A. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07051304
ABSTRACT:
A verification process comprises a verification environment having a hardware development language interface. The verification process also comprises a device under test having a hardware development language interface operable to communicate with the verification environment hardware development language interface, and also having an Infiniband interface. The verification process additionally comprises a remote Infiniband link having an Infiniband interface operable to communicate with the device under test Infiniband interface and also having a socket protocol interface operable to communicate with a further verification process.
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Bozkaya Ali
Schanke Morten
Park Vaughan & Fleming LLP
Sun Microsystems Inc.
Tat Binh
Whitmore Stacy A.
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