Distributed charge source

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C365S226000, C327S536000

Reexamination Certificate

active

06272670

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to integrated circuits, and more specifically to integrated circuit memories.
REFERENCE TO CO-PENDING APPLICATIONS
The present invention is related to the following co-pending applications for patents:
“TILED MEMORY AND MEMORY TILE FOR USE THEREIN” by William Daune Atwell, et al., having Ser. No. 09/286,178 and assigned to the assignee hereof and filed concurrently herewith;
“MEMORY TILE FOR USE IN A TILED MEMORY” by Michael L. Longwell, et al., having Ser. No. 09/286,186 and assigned to the assignee hereof and filed concurrently herewith;
“METHOD FOR DESIGNING A TILED MEMORY” by William Daune Atwell, et al., having Ser. No. 09/286,186 and assigned to the assignee hereof and filed concurrently herewith;
“METHOD FOR DESIGNING A MEMORY TILE FOR USE IN A TILED MEMORY” by Michael L. Longwell, et al., having Ser. No. 09/286,206 and assigned to the assignee hereof and filed concurrently herewith.
BACKGROUND OF THE INVENTION
Modern integrated circuits require on chip charge sources to provide voltage signals to various portions of the integrated circuit. For example, charge sources are used to provide voltage signals to capacitor plates in dynamic random access memories. In addition, they are also used to provide voltage signals which are used to bias well regions, so that noise, leakage current and soft error rate can be reduced. Unfortunately, these charge sources also create noise within integrated circuits. Specifically, when the charge sources are initially turned on they produce a voltage signal which contains noise, and this can adversely effect the operation and performance of integrated circuits which have low operating voltages.
Accordingly, a need exists for a charge source that produces a reference voltage that has reduced noise.
SUMMARY OF THE INVENTION
The present invention overcomes the problems of the prior art memory circuits by providing a distributed charge source supply. According to the present invention, a plurality of atomic charge sources are integrated into an integrated circuit device. In accordance with the present invention, each of the atomic charge sources provides one unit of charge per unit time. In an integrated circuit requiring n units of charge per unit time, at least n atomic charge sources are provided. In one embodiment, each of the atomic charge sources is an atomic charge pump. In this embodiment, the atomic charge pumps are operated sequentially. In one alternate embodiment, the atomic charge sources are atomic voltage regulators. In this alternate embodiment, the atomic voltage regulators are operated simultaneously. In either embodiment, the atomic charge sources may be physically distributed across the integrated circuit.


REFERENCES:
patent: 5301097 (1994-04-01), McDaniel
patent: 5877651 (1999-03-01), Furutani
patent: 6023188 (2000-02-01), Lee et al.

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