Distributed bit switch logically interleaved for block write per

Details Distributed bit switch logically interleaved for block write per Distributed bit switch logically interleaved for block write per

1997-02-28

1998-05-19

Le, Vu Anh

Static information storage and retrieval

Read/write circuit

36523003, 365 63, G11C 700

Patent

active

057544794

ABSTRACT:
The invention describes a technique in which the performance of a block write operations for SGRAM and VRAM are improved. The technique also produces improved noise margin along the data line when connecting to bit switches under mask during block write operation. The technique rearranges the physical location of each bit switch located along the data lines such that the worse case configuration is not clustered at the end of the data lines during a block write operation. This reduces the voltage drop along the data lines and provides more energy to switch bit lines or the corresponding memory columns. It also produces less drop on the bit lines as a result of doing a mask during the block write operation.

REFERENCES:
patent: 5267196 (1993-11-01), Talreja et al.
patent: 5663923 (1997-09-01), Baltar et al.

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