Distributed amplifier logic designs

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

326112, 326 55, H03K 19094

Patent

active

059458470

ABSTRACT:
A high speed logic module is formed to include a differential input formed as a pair of inductive transmission lines and a differential output also formed as a pair of inductive transmission lines. A pair of logic devices are included in the module, with the gate terminals of the devices coupled to separate ones of the input inductive transmission lines. The output terminals of the logic devices are coupled to separate ones of the pair of output inductive transmission lines. The effects of the intrinsic gate-to-drain capacitance C.sub.gd inherent in each logic device is compensated for by including a pair of cross-coupled neutralizing capacitors between the drain and gate terminals of the logic devices. Various logic circuits, such as oscillators, latches, delay lines, etc. can be formed using the differential, neutralized structure of the invention.

REFERENCES:
patent: 4562365 (1985-12-01), Redfield
patent: 5008568 (1991-04-01), Leung et al.
Horenstein, Microelectronic circuits and devices, Prentice-Hall, p. 564, 1990.
"Distributed Amplification", E.L. Ginzton et al; Proceedings of the I.R.E., Aug. 1948, pp. 956 et seq.
"On Distributed Amplification", D.G. Sarma, Proceedings of the I.E.E., Sep. 1955, pp. 689 et seq.
"Distributed amplifiers: survey of the effects of lumped-transmission-line design on performance", W.K. Chen et al, Proceedings of the I.E.E., Apr. 1967.
"Distributed amplification: A New Approach", W.K. Chen, IEEE Transactions on Election Devices, vol. ED-14, No. 4, Apr. 1967, pp. 215 et seq.
"IF Amplifier Using C.sub.c Compensated Transistors", J.A. Mataya et al, IEEE Journal of Solid-State Circuits, vol. SC-3, No. 4, Dec. 1968, pp. 401 et seq.
"An outline of Design Techniques for Linear Integrated Circuits", H.R. Camenzind et al, IEEE Journal of Solid-State Circuits, vol. SC-4, No. 3, Jun. 1969, pp. 110 et seq.
"A DC-12 MHz Monolithic GaAsFET Distributed Amplifier", E.W. Strid et al, IEEE Transactions on Microwave Theory and Techniques, vol. MTT-30, No. 7, Jul. 1982, pp. 969 etseq.
"Gain and Bandwidth Characteristics . . . ", J. Choma, Jr., IEEE Transactions on Circuits and Systems, vol. CAS-33, No. 1, Jan. 1986, pp. 66 et seq.
"Coupled-Wave Small-Signal Transient Analysis . . . ", K. Han et al, IEEE Transactions on Microwave Theory and Techniques, vol. 38, No. 1, Jan. 1990, pp. 23 et seq.
"A Low-Power Wide Band Amplifier . . . ", T. Wakimoto et al, IEEE Journal of Solid-State Circuits, vol. 25, No. 1, Feb. 1990, pp. 200 et seq.
"Capacitive Feedback Technique for Wide-Band Amplifiers", M. Vadipour, IEEE Journal of Solid-State Circuits, vol. 28. No. 1, Jan. 1993, pp. 90 et seq.
"A New Compensation Technique . . . ", M. Vadipour, IEEE Journal of Solid-State Circuits, vol. 28, No. 1, Jan. 1993, pp. 93 et seq.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Distributed amplifier logic designs does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Distributed amplifier logic designs, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Distributed amplifier logic designs will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2427306

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.