Computer graphics processing and selective visual display system – Display peripheral interface input device
Patent
1996-03-28
1999-11-16
Hjerpe, Richard A.
Computer graphics processing and selective visual display system
Display peripheral interface input device
345204, G09G 502
Patent
active
059866411
ABSTRACT:
On a computer body side, there is provided a low voltage parallel-serial conversion circuit for converting R, G and B digital parallel signals of a first potential, which are output from a display controller, to serial signals of a second potential lower than the first potential and converting a display clock signal and a control signal (FP, LP, DATA ENAB) each having the first potential to a clock signal and a control signal (FP, LP, DATA ENAB) each having the second potential. On a display apparatus side, there is provided a low voltage serial-parallel conversion circuit for converting the second-potential R, G and B signals, which are output from the low voltage parallel-serial conversion circuit, to parallel R, G and B signals of the first potential and restoring the second potential clock signal and control signal (FP, LP, DATA ENAB) to the first-potential clock signal and control signal (FP, LP, DATA ENAB). The display color signals, clock signal and control signal output from the low voltage serial-parallel conversion circuit are supplied to a flat panel.
REFERENCES:
patent: 5170158 (1992-12-01), Shinya
patent: 5673058 (1997-09-01), Uragami et al.
patent: 5703645 (1997-12-01), Kiriyama et al.
National Semiconductor, "DS90CR581/DS90CR582 LVDS 24-Bit Color Flat Panel Display (FPD) Link", Final-Rev. 1.3, pp. 1-10 (1995).
Hjerpe Richard A.
Kabushiki Kaisha Toshiba
Laneau Ronald
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