Display controller with display memory circuit

Details Display controller with display memory circuit Display controller with display memory circuit

2004-12-01

2009-02-24

Tung, Kee M (Department: 2628)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Graphic display memory controller

C345S534000, C345S536000

Reexamination Certificate

active

07495668

ABSTRACT:
A display memory circuit includes a drawing memory and a dynamic display memory. The drawing memory stores data and at least a portion of the data are possibly rewritten into a new data at a third timing, the third timing being optional between a first timing and a second timing. The dynamic display memory is connected with the drawing memory, which latches the data in response to the first timing and continues to hold the data between the first timing and the second timing. The drawing memory is partially disconnected from the dynamic display memory in the rewritten portion when the portion is rewritten in the drawing memory.

REFERENCES:
patent: 5818434 (1998-10-01), Yamamoto et al.
patent: 2002/0075272 (2002-06-01), Tani et al.
patent: 8-161890 (1996-06-01), None
patent: 2000-250733 (2000-09-01), None

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