Display controller

Computer graphics processing and selective visual display system – Computer graphics display memory system – Graphic display memory controller

Reexamination Certificate

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Details

C345S010000, C345S213000, C345S428000, C345S520000, C345S531000, C713S501000

Reexamination Certificate

active

07598959

ABSTRACT:
Apparatus and systems, as well as methods and articles, may operate to update video display pixels. A video display bus can communicate data to a video display according to specified clock frequencies and a refresh time period. Power conservation can be enhanced by adjusting the specified clock frequencies and/or refresh time period to provide idle time on the video display bus.

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patent: 1239448 (2002-09-01), None
patent: WO-9641253 (1996-12-01), None
patent: WO-2007002921 (2007-01-01), None
Bloks, R. H., “The IEEE-1394 High Speed Serial Bus”,Philips Journal of Research, 50(1), (1996),209-216.

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