Electrical computers and digital processing systems: memory – Storage accessing and control
Reexamination Certificate
2000-01-24
2002-07-02
Yoo, Do Hyun (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
C711S112000, C360S039000, C360S051000, C360S073020
Reexamination Certificate
active
06415349
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a disk drive including a read channel circuit and a disk controller circuit. More particularly, the invention relates to a disk drive which demodulates a read signal representing data in a data sector and a servo sector in a first order and provides data-sector data and servo sector data to a disk controller in a second order.
2. Description of the Prior Art and Related Information
Magnetic hard disk drives conventionally arrange data as blocks, also known as sectors, within concentric tracks on the surface of rotating storage mediums. Such disk drives are described in U.S. Pat. No. 5,606,466 to Fisher et at
Disk drive storage capacity is governed by the areal density expressed in bits/in
2
which can be achieved on a disk media surface. The two components of areal density are track pitch (the distance between adjacent tracks) and linear bit density (the distance between bits along a track). Improvements in linear bit density are to a great extent dependent on signal processing in a read channel circuit which demodulates signals read from the track to produce digital symbols.
In order to continue improving linear bit density and maintain competitive product offerings, read channel demodulating circuits currently and will continue to provide more complex signal processing, which will in turn require longer periods of latency to convert media signals to digital symbols which can be provided to a disk controller or formatter for assembly into discrete data blocks and error correction.
The latency problem is further complicated by the embedded servo system employed in most disk drives to control read/write head positioning by interspersing servo sectors with data regions on each track of a disk surface. Such a system is described in application Ser. No. 08/815,352 filed Mar. 11, 1997 (the Sync Mark Application), assigned to the assignee of this invention. The Sync Mark Application is hereby incorporated by reference in its entirety.
With an embedded servo system, servo sectors must be processed by the channel circuit in real time regardless of signal processing which is related to data sectors. The above-mentioned embedded servo system format requires that servo sectors and data sectors are alternately presented to a read channel circuit for demodulating. The servo sectors must be demodulated and presented with minimal latency to a servo controller which may be included in a disk controller circuit to enable the servo system to maintain control of the position of read/write heads. The disks controller comprises a timer for sampling the servo sectors synchronous with the servo sample rate as described in the Sync Mark Application.
After demodulating the servo and data sectors, the read channel transmits them on a bus connected between the channel circuit and the disk controller, the combination defining a disk drive signal path. The disk controller is responsible for providing timing signals which alert the channel circuit to presence of servo or data sectors which are currently passing or about to pass under the read/write head by asserting one of a plurality of signals comprising a SERVO GATE, a READ GATE and a WRITE GATE for defining periods or intervals for reading servo sectors, or reading or writing data sectors, on the rotating med. Generally, asserting a signal as defined herein means driving a signal to its logically “true” state regardless of polarity. A further convention used herein is to identify signals having negative polarity assertions with a trailing “-” sign as for example SYNC DET-.
As linear bit densities have increased, the problem of so-called pulse crowding has become more prevalent. Pulse crowding problems and their drawbacks are described in U.S. Pat. No. 5,606,466. As further described therein more powerful synchronously sampled data detection channels have been employed to place coded information bits, which can be placed more closely together, within the data sectors. One class of read channels comprises partial response, maximum likelihood (PRML) channels also described in U.S. Pat. No. 5,341,249 to Abbott et al, and the Sync Mark Application.
PRML channels, and other read channels which work with coded bits, demodulate the coded bits when receiving the data bits from the data sectors. This process is also knowm as demodulating the data sectors and is so called herein. As discussed in U.S. Pat. No. 5,606,466, the demodulating of the data sectors causes a demodulating delay, or latency, of at least several bytes for typical bit coding algorithms of today. Conversely, the servo sectors are typically not coded to such a degree, and therefore an inequality in demodulating time by the read channel exists between the servo sectors, which are and must be demodulated in relative real time without such a latency, and the data sectors, which have heretofore been demodulated and transmitted to the disk controller in order of receipt from the rotating medium Further, as bit coding techniques become more complicated, so that linear bit densities may increase, the latency for demodulating the data sectors may increase to hundreds of bits or even multiple sectors. However, the servo sectors must nevertheless be demodulated and transmitted to the disk controller in real time so that the servo system may keep the transducer head in the servo system on track.
Some systems add pad fields or speed tolerance buffers to separate sectors on the drive so that the digital latency delay may be compensated for on the rotating medium as described with respect to
FIG. 1
in U.S. Pat. No. 5,606,466. U.S. Pat. No. 5,606,466 describes another technique for dealing with the latency period which comprises clocking real-time and digital signal processes by a clock synchronized to the data sector as the data sector passes under the transducer head, clocking the digital signal processes for the data sector by an asynchronous clock, and clocking the servo sector in real time. However, neither of these solutions allow for larger latencies during which the servo sector must be demodulated and transmitted to the disk controller in real time while a previously received data sector or segment thereof is stil being demodulated. Adding pad fields between sectors is undesirable because such a technique lowers the capacity of the hard disk system. The latter technique is undesirable because it delays both the demodulating of data sectors, and the demodulating of the servo sectors so that the order of transmission of the servo and data sectors maybe maintained after the latency. It is not desirable to delay demodulating the servo sectors because the servo sectors provide the information needed for the disk controller to keep the servo system on track.
Accordingly, what is needed is a system and method for allowing a longer latency period for demodulating and transmitting of the data sectors, while allowing demodulating and transmitting of the servo sectors in relative real-time. Such a system would ideally be implemented without having to define a separate or significantly wider set of data lines in the disk controller bus between the channel circuit and the disk controller. U.S. Pat. No. 5,829,011 discloses a method for transmitting register values and user data on the same lines. However, the system disclosed therein does not provide a method for allowing a longer latency period for demodulating and transmitting of data sectors, while allowing demodulating and transmitting of the servo sectors in relative real-time.
SUMMARY OF THE INVENTION
This invention can be regarded as a disk drive comprising a disk comprising a track having a data sector and a servo sector. The disk drive includes a channel circuit, a disk controller circuit and a unified bus connected between the channel circuit and the disk controller circuit and having a data-carrying medium. The channel circuit comprises a channel register for storing register data; means for receiving and demodulating a first series of signals representing data stored in th
Hull Richard W.
Jung Hoover K.
Mathur Sanjay S.
Moazzami Nasser
Shara Milad G
Western Digital Technologies Inc.
Yoo Do Hyun
LandOfFree
Disk drive with unified channel-disk controller bus for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Disk drive with unified channel-disk controller bus for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Disk drive with unified channel-disk controller bus for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2918789