Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2005-07-15
2009-02-03
Shah, Sanjiv (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S118000, C711S126000, C711S135000, C711S137000, C711S167000, C365S049130, C365S050000
Reexamination Certificate
active
07487290
ABSTRACT:
Where realtime performance-critical processing is executed in parallel with data integrity-critical processing, embodiments of the invention improve the realtime performance by raising the data transfer efficiency for sequential access-dominant realtime processing. In one embodiment, if a non-realtime processing command is received while read-ahead is in progress for a realtime processing command, processing of the non-realtime processing command is not started until a certain amount of data is cached. In addition, in order to prevent the periodicity disturbance of realtime processing, when the processing of the non-realtime processing command is postponed, the read-ahead is continued maximally until the timestamp at which the next realtime processing command is expected to be issued.
REFERENCES:
patent: 6606717 (2003-08-01), Yu et al.
patent: 6728840 (2004-04-01), Shatil et al.
patent: 2002/0169926 (2002-11-01), Pinckney et al.
patent: 2004/0088504 (2004-05-01), Hsu et al.
patent: 06-095810 (1994-04-01), None
Hiratsuka Yukie
Nishikawa Manabu
Dillon Samuel
Hitachi Global Storage Technologies - Netherlands B.V.
Nader Rambod
Shah Sanjiv
Townsend and Townsend / and Crew LLP
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