Disk drive comprising a multiple-input sequence detector...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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Details

C714S794000, C714S755000

Reexamination Certificate

active

06604220

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to disk drives for digital computers. More particularly, the present invention relates to a disk drive employing a multiple-input sequence detector comprising a first and second iterative detectors and an ECC decoder for decoding a first estimated data sequence detected by the multiple-input sequence detector into a decoded codeword concurrent with the multiple-input sequence detector detecting a second estimated data sequence, wherein the bits of the decoded codeword are used to assist the multiple-input sequence detector in detecting a third estimated data sequence.
2. Description of the Prior Art
It is well known that the bandwidth together with the signal-to-noise ratio (SNR) determines the capacity of a bandlimited communication system. This applies to disk storage systems for digital computers which are bandlimited in nature where “capacity” refers to the areal storage density of data recorded on a disk and thus refers to the storage capacity of the disk drive. Disk drive designers continually attempt to increase storage capacity by improving the materials and mechanics of the recording process, as well as by applying special signal processing and coding techniques in order to improve the effective SNR.
Modulation and error correction codes (ECC) are example coding schemes employed in disk drives which increase the effective SNR and thereby achieve an increase in storage capacity while still achieving some arbitrarily low bit error rate. Examples of modulation codes include a run length limited (RLL) code which limits the spacing between adjacent surface alterations on the disk in order to limit intersymbol interference (ISI), a distortion in the read signal caused by closely spaced, overlapping pulses. For example, in a system where a binary “1” bit modulates a surface alteration and a “0” bit modulates no surface alteration (i.e., NRZI recording), an RLL (d, k) code constrains the recorded data sequence such that at least d “0” bits occur between consecutive “1” bits, thereby ensuring that consecutive surface alterations are spread apart to limit ISI. Other examples of modulation codes include trellis codes, DC free codes, matched spectral null codes, maximum transition run codes, and other codes directed at increasing the effective SNR.
Modulation codes are typically augmented by ECC codes which further increase the effective SNR by encoding the user data into codewords that exhibit a minimum distance property measured relative to a Hamming distance. The Hamming distance defines the difference between valid codewords of the ECC code, and the minimum Hamming distance defines the correction power of the ECC code.
The extent that modulation and ECC codes increase the storage capacity of a disk drive is referred to as the “coding gain”, which is normally measured as the SNR difference (in dB) between a system with coding and a system without coding that will achieve some arbitrarily low bit error rate. There is a limit, however, to the amount of gain that modulation and ECC codes can provide in a storage system because of the additional redundancy required to implement the code which decreases the user data density. This ratio of user data bits to codeword bits is referred to as the code rate; as the code rate decreases, the channel density must increase in order to maintain a desired user data density. Thus, there is a true coding gain only if the code rate is large enough to allow an increase in the user data density as compared to an uncoded system.
Other techniques have also been employed in disk drives in order to increase the effective SNR and increase storage capacity. As mentioned above, ISI typically causes the SNR in the read signal to decrease as the areal density increases. Various filtering techniques have been employed in the prior art to slim the pulses in order to reduce the undesirable degradation caused by ISI, but filtering the read signal tends to boost the high frequency noise. More recent disk drives employ special signal processing techniques referred to as partial response (PR) equalization with maximum likelihood (ML) sequence detection or PRML sequence detection which allows for a controlled amount of ISI rather than attempting to eradicate it through filtering. Since the effect of the controlled ISI in PRML systems is known, it can be taken into account in the sequence detection algorithm when demodulating the read signal into an estimated data sequence. This increases the effective SNR resulting in a corresponding increase in storage capacity; however, the extent that known PRML systems improve performance is limited.
There is, therefore, a need to increase the effective SNR in disk drives in order to achieve higher storage capacities while still achieving some arbitrarily low bit error rate. In particular, there is a need to improve upon known sequence detection techniques in order to improve the accuracy of the estimated data sequence detected during a read operation, thereby allowing for an increase in storage capacity without sacrificing performance in terms of bit error rate.
SUMMARY OF THE INVENTION
The present invention may be regarded as a disk drive employing an improved sequence detection technique during read operations. The disk drive comprises a disk for storing data, and a head for reading the data to generate an analog read signal. A sampler samples the analog read signal to generate a sequence of read signal sample values, and a multiple-input sequence detector detects an estimated data sequence from the read signal sample values during a read operation. The multiple-input sequence detector detects a first estimated data sequence during a first time interval, a second estimated data sequence during a second time interval, and a third estimated data sequence during, a third time interval. The multiple-input sequence detector comprises a first iterative detector, responsive to the read signal sample values and biased by selected reliability metrics, for generating first reliability metrics, and a second iterative detector, responsive to the read signal sample values and biased by the first reliability metrics, for generating second reliability metrics. An ECC decoder decodes the first estimated data sequence into at least one decoded codeword comprising a plurality of bits concurrent with the multiple-input sequence detector detecting the second estimated data sequence. A local memory stores the bits of the decoded codeword, and a means selects between the second reliability metrics and bits of the decoded codeword stored in the local memory as the selected reliability metrics for use in biasing the first iterative detector, whereby the bits of the decoded codeword assist the multiple-input sequence detector in detecting the third estimated data sequence.
The present invention may also be regarded as a method of improving a sequence detection operation in a disk drive. Data stored on a disk is read to generate an analog read signal. The analog read signal is sampled to generate a sequence of read signal sample values, and an estimated data sequence is detected from the read signal sample values. The read signal sample values are processed to detect a first estimated data sequence during a first time interval, a second estimated data sequence during a second time interval, and a third estimated data sequence during a third time interval. The step of detecting the first, second, and third estimated data sequences comprises the steps of detecting first reliability metrics from the read signal sample values while biased by selected reliability metrics, and detecting second reliability metrics from the read signal sample values while biased by first reliability metrics. The first estimated data sequence is decoded by an ECC decoder into at least one decoded codeword comprising a plurality of bits which are stored in a local memory. A selection is made between the second reliability metrics and bits of the decoded codeword stored in the local memory as

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