Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Patent
1997-09-17
2000-02-22
Bragdon, Reginald G.
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
711113, 710 17, 710 18, 710 19, 710 52, 710 57, 710 60, G06F 1316
Patent
active
06029227&
ABSTRACT:
Disclosed is a disk control apparatus having a device adapter connected to an internal bus. This device adapter includes an interface circuit for transferring data to the internal bus, a data transfer circuit for forming a plurality of data transfer paths through which a plurality of disk devices transfer data in parallel, and a buffer memory having buffer areas respectively provided for the data transfer paths. After instructing access to a disk device, a control circuit instructs data transfer to an associated buffer area, and instructs transfer of data in the buffer memory to the internal bus when the amount of data in the buffer area reaches a predetermined amount. This permits parallel data transfer from a plurality of disk devices.
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Bragdon Reginald G.
Fujitsu Limited
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