Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2005-01-18
2005-01-18
Peikari, B. James (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S003000, C711S130000
Reexamination Certificate
active
06845426
ABSTRACT:
A disk array controller prevents a cache page conflicts between a plurality of commands issued from the same host. A disk array controller10includes host directors161and162, which are provided for hosts121and122, one for each, and which controls I/O requests from the hosts121and122to execute input/output to or from disk drives141and142, and a shared memory18shared by the host directors161and162and forming a disk cache. When the host121issues a plurality of read commands to the same cache page, the host director161starts a plurality of data transfers while occupying the cache page during processing of said plurality of read commands.
REFERENCES:
patent: 5222217 (1993-06-01), Blount et al.
patent: 5363498 (1994-11-01), Sakuraba et al.
patent: 04313126 (1992-11-01), None
patent: 2000-187617 (2000-07-01), None
McGinn & Gibb PLLC
NEC Corporation
Peikari B. James
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