Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Patent
1997-09-24
2000-03-21
Cabeca, John W.
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
711156, 711114, 711152, G06F 1314
Patent
active
060413948
ABSTRACT:
A method and apparatus, for a system having a plurality of host computers and a memory system having a disk controller with at least one mass storage device having a plurality of logical volumes, provide for write protecting the logical volumes at the controller port level. The method features changing the write protect status of one or more logical volumes, on a port level basis, in response to a first host request to change a write protect status; writing a write protect status message to a memory associated with the controller channel directors; polling, from each channel director, the memory for an unread write protect status messages; and preventing, at, for example, the channel director port level, a host connected to the channel director from writing to a protected logical volume which is write protected from that host or host port. The write protect status of that channel director, for that logical volume, remains in effect until the write protect condition for that volume has been reset. A lock mechanism must be obtained to make any changes in the logical volume write protect status.
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Halligan Kenneth A.
Ofer Erez
Cabeca John W.
EMC Corporation
Tzeng Fred F.
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