Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2002-05-09
2003-04-15
Bragdon, Reginald G. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S112000
Reexamination Certificate
active
06549981
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to disk arrays, and more particularly, relates to hardware and software architectures for hardware-implemented RAID (Redundant Array of Inexpensive Disks) and other disk array systems.
BACKGROUND OF THE INVENTION
A RAID system is a computer data storage system in which data is spread or “striped” across multiple disk drives. In many implementations, the data is stored in conjunction with parity information such that any data lost as the result of a single disk drive failure can be automatically reconstructed.
One simple type of RAID implementation is known as “software RAID.” With software RAID, software (typically part of the operating system) which runs on the host computer is used to implement the various RAID control functions. These control functions include, for example, generating drive-specific read/write requests according to a striping algorithm, reconstructing lost data when drive failures occur, and generating and checking parity. Because these tasks occupy CPU bandwidth, and because the transfer of parity information occupies bandwidth on the system bus, software RAID frequently produces a degradation in performance over single disk drive systems.
Where performance is a concern, a “hardware-implemented RAID” system may be used. With hardware-implemented RAID, the RAID control functions are handled by a dedicated array controller (typically a card) which presents the array to the host computer as a single, composite disk drive. Because little or no host CPU bandwidth is used to perform the RAID control functions, and because no RAID parity traffic flows across the system bus, little or no degradation in performance occurs.
One potential benefit of RAID systems is that the input/output (“I/O”) data can be transferred to and from multiple disk drives in parallel. By exploiting this parallelism (particularly within a hardware-implemented RAID system), it is possible to achieve a higher degree of performance than is possible with a single disk drive. The two basic types of performance that can potentially be increased are the number of I/O requests processed per second (“transactional performance”) and the number of megabytes of I/O data transferred per second (“streaming performance”).
Unfortunately, few hardware-implemented RAID systems provide an appreciable increase in performance. In many cases, this failure to provide a performance improvement is the result of limitations in the array controller's bus architecture. Performance can also be adversely affected by frequent interrupts of the host computer's processor.
In addition, attempts to increase performance have often relied on the use of expensive hardware components. For example, some RAID array controllers rely on the use of a relatively expensive microcontroller that can process I/O data at a high transfer rate. Other designs rely on complex disk drive interfaces, and thus require the use of expensive disk drives.
The present invention addresses these and other limitations in existing RAID architectures.
SUMMARY OF THE INVENTION
One particular embodiment of the invention is a disk array controller that controls a plurality of ATA disk drives. The disk array controller comprises a plurality of automated controllers, each of which implements a host side of a standard ATA interface protocol within automated circuitry to control a respective ATA disk drive. The automated controllers are connected by a control bus to a microcontroller that dispatches disk drive commands to the automated controllers in response to I/O requests from a host computer. The microcontroller is preferably programmed to support one or more RAID configurations. The automated controllers are also connected by a second bus to an automated processor. The automated processor transfers I/O data between the automated controllers/ATA disk drives and the host computer, and tracks the completion statuses of pending I/O requests.
Each automated controller preferably includes a command buffer for storing disk drive commands to be executed by a respective ATA drive, and a data buffer that stores I/O data being transferred to or from the ATA disk drive. By automating the host side of the ATA protocol, the present invention provides a high degree of I/O performance, particularly in the context of RAID and other disk array systems. The automated controller may, for example, be embodied within an ASIC or FPGA device.
One aspect of the invention is thus a disk array controller comprising a plurality of controllers, each controller automating a host side of an ATA protocol to control a respective disk drive of a plurality of disk drives. The disk array controller further comprises a processor that processes input/output data written to and read from the disk drives; and a bus that interconnects, and carries input/output data between, the processor and each of the plurality of controllers. The disk array controller may also include a microcontroller that dispatches disk drive commands to the controllers over a control bus that is separate from the bus used to transfer input/output data.
Another aspect of the invention is an input/output subsystem comprising an ATA (AT Attachment) disk drive, and a controller external to the ATA disk drive and connected to the ATA disk drive by a set of signal lines. The controller implements a host side of an ATA protocol within automated circuitry to control the ATA disk drive over the set of signal lines. The controller preferably includes a command buffer that buffers disk drive commands to be executed by a respective ATA drive, and a data buffer that stores I/O data being transferred to and from the ATA disk drive.
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Altman Mitchell Allen
Herz John Peter
McDonald James Arthur
Smith, III William Edward
3ware, Inc.
Bragdon Reginald G.
Knobbe Martens Olson & Bear LLP
Vital Pierre M.
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