Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2003-08-07
2008-10-07
Peikari, B. James (Department: 2189)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S113000
Reexamination Certificate
active
07434026
ABSTRACT:
A logical table has a layered structure formed of a higher layer logical table arranged on a memory and a lower layer logical table arranged on a disk and stores where each part of a physical region corresponding to each part of a virtual volume is located, a physical table has a layered structure formed of a higher layer physical table arranged on the memory and a lower layer physical table arranged on the disk and stores a state of assignment of each part of a physical region, and a controller copies a part or all of the lower layer logical table and the lower layer physical table into the memory to conduct management of virtual volume.
REFERENCES:
patent: 07-210332 (1995-08-01), None
patent: 2002-073409 (2002-03-01), None
McGinn IP Law Group PLLC
NEC Corporation
Peikari B. James
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