Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2006-10-10
2006-10-10
Padmanabhan, Mano (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S112000, C711S113000
Reexamination Certificate
active
07120740
ABSTRACT:
Disclosed herewith is a disk array system configured by a plurality of disk array controllers and another disk array apparatus that are operated as an integrated storage system while the system is prevented from degradation of the performance. The disk array controller is provided with a channel interface unit, a disk interface unit, a cache memory unit, a shared memory unit, a shared memory interconnection network for connecting a plurality of disk array control units to each another, and an inter-unit CM-SW for connecting a plurality of disk array control units to each another. The shared memory unit includes another disk array apparatus volume information collection unit for retaining volume information of another disk array apparatus while the inter-unit CM-SW includes a protocol translation interface.
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Fujimoto Kazuhisa
Takase Masayuki
A. Marquez, Esq. Juan Carlos
Fisher Esq. Stanley P.
Padmanabhan Mano
Reed Smith LLP
Vo Thanh D.
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