Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1998-02-26
1999-09-21
Beausoliel, Jr., Robert W.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714770, G06F 1100
Patent
active
059548223
ABSTRACT:
A parity which is used to a disk array is formed by using a cache memory. A storing method of the cache memory is classified into three methods such that: only data is stored; only redundant information is stored; and both of the data and the redundant information are stored. Even when a power source is shut off during the data writing process, the processing stages of the data writing and parity updating and the necessary data are stored into a non-volatile memory and are used for recovery.
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Iwatani Sawao
Obata Takeshi
Takeda Suijin
Yashiro Mitsuhiko
Beausoliel, Jr. Robert W.
Fujitsu Limited
Iqbal Nadeem
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