Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Patent
1996-11-06
1998-07-28
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
711113, 711155, 39518204, G06F 1110
Patent
active
057874603
ABSTRACT:
A parity which is used to a disk array is formed by using a cache memory. A storing method of the cache memory is classified into three methods such that: only data is stored; only redundant information is stored; and both of the data and the redundant information are stored. In order to save processing time, a new set of redundant information (or parity data) is not calculated for every data update. Instead, the new parity data is only calculated after there have been a predetermined number of data updates. In addition, even when a power source is shut off during the data writing process, the processing stages of the data writing and parity updating and the necessary data are stored into a non-volatile memory and are used for recovery.
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Iwatani Sawao
Obata Takeshi
Takeda Suijin
Yashiro Mitsuhiko
Chan Eddie P.
Ellis Kevin L.
Fujitsu Limited
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