Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2005-05-31
2005-05-31
Ellis, Kevin L. (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
Reexamination Certificate
active
06901479
ABSTRACT:
A controller retrieves effective logical addresses sequentially according to a copy of an address translation table at the time of the start of storage capacity expansion in the process of expanding the storage capacity of a disk array by adding a disk drive to the disk array. The controller stores the data in the logical address into a restructured write buffer each time an effective logical address is retrieved. The controller writes one stripe worth of data blocks including one stripe of logical blocks and a logical address tag block into an empty area different from the area in which the data to be updated has been stored in the data array each time one stripe worth of logical blocks of data is accumulated in the write buffer.
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Ellis Kevin L.
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
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