Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-03-08
2002-12-24
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S330000, C257S339000
Reexamination Certificate
active
06498367
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to discrete semiconductor devices and in particular power semiconductor devices. More particularly, the present invention relates to power semiconductor rectifiers including semiconductor diodes, Schoftky diodes and synchronous rectifiers.
2. Background of the Invention
Power semiconductor rectifiers have a variety of applications including applications in power supplies and voltage converters. For example, an important application of such rectifiers is in DC to DC voltage converters and power supplies for personal computers and other electronic devices and systems. In such applications, it is important to provide both a fast recovery time for the semiconductor rectifier and a low forward voltage drop across the rectifier (V
f
). In particular, DC to DC voltage converter applications employ switched inputs and the recovery time of the rectifier used in the voltage converter will affect the dynamic losses for a given frequency of operation of the input. Also, a fast recovery time is needed for rectification of high frequency signals which are present in computers and many other electronic devices.
A low V
f
in turn is needed in low voltage applications including power supplies for computers and other low voltage (e.g., 12 volt and lower) electronics applications. In particular, computer applications will typically require both a five volt power supply and a 3.5 volt power supply and in the future it may be as low as a one volt power supply. In converting the input five volt power supply to a 3.5 volt power supply, the voltage converter will inevitably introduce a loss due to the V
f
drop across the rectifier in the converter circuit. In typical fast recovery semiconductor diodes employed in such devices, the voltage drop V
f
may be approximately 0.7-0.8 volts. This results in a significant percentage of available power being wasted due to the voltage drop across the rectifier. For example, as much as 40% of the available power may be wasted in a two step voltage conversion from a 5 volt input to a one volt output. As a result, a significant portion of the available power may be simply dissipated in the device due to the relatively high V
f
. This wasted power is obviously significant in laptop and notebook computers and other portable devices relying on battery power. However, such wasted power is also a significant problem in desktop computers and other devices due to heat generation.
While it is possible to adjust the properties of the diode junction to increase the recovery speed of the diode or to reduce the V
f
of the diode, it is typically impossible to simultaneously lower both the voltage drop across the diode and at the same time decrease the recovery time of the diode. In computer applications the compromise is usually made in favor of fast recovery times.
Schottky diodes provide some advantages since Schottky diodes have a lower V
f
for a given recovery time than semiconductor diodes. Nonetheless, such Schottky diode rectifiers suffer from problems such as high leakage current and reverse power dissipation. Also, these problems increase with temperature causing reliability problems for power supply applications. Therefore, the design of voltage converters using Schottky barrier diodes can cause design problems for many applications. Also, Schottky diodes are typically more expensive than semiconductor junction diodes due to yield problems.
As an alternate approach, synchronous rectifiers have been designed which avoid some of the problems associated with both Schottky diodes and PN junction diodes for high speed low voltage applications. Conventional power MOSFETs are typically employed for such synchronous rectifiers, and gate controller ICs have been used for driving the discrete MOSFET devices in order to provide synchronous rectifiers with the desired device characteristics. The current state of such approaches to synchronous rectifiers for high performance rectifier applications is described, for example, in Bob Christiansen, et al. “Synchronous Rectification”,
PCIM
, August 1998. The need for a driver IC, however, adds additional complexity and costs over simpler rectifiers.
A different approach to the problem that addresses most of the shortcomings of the Schottky diodes can be derived from an observation that the subthreshold current of a MOSFET as a function of drain voltage exhibits rectifying properties, which may be appreciated from the following equation (1):
(
1
-
ⅇ
-
k
T
q
V
d
)
I
s
=
I
d
(
1
)
(See, for example, S. M. Sze, Physics of Semiconductor Devices, Chapter “MOSFET”, paragraph “Subthreshold Region”.) In the above expression, I
d
is the Drain Current; V
d
is the Drain Voltage and I
s
is an equivalent saturation current which value is mainly determined by the surface potential &psgr;
s
and the gate voltage V
G
. Fixing V
G
(e.g., by shorting it to Drain) will lead to the rectifying Volt Ampere characteristic with the equivalent “barrier height” determined by the internal device parameters (gate oxide thickness, doping concentrations, surface states, etc.; e.g., reference S. M. Sze above).
An example of such approach directed to providing a power rectifier suitable for low voltage applications is described in U.S. Pat. No. 5,825,079 to Metzler, et al., issued Oct. 20, 1998. In the '079 patent, a rectifier device is described which may be viewed as a vertical MOSFET structure having a gate to drain short. This device is thus a type of a rectifier as described above. There are several attributes of the teaching of the '079 patent, which significantly undermine its practical usefulness. For example, the proposed procedure of formation of a P type body region (denoted by reference numeral 56 in
FIG. 3
of the '079 patent) introduces serious yield problems in the manufacture of the device. This arises since the characteristics of the carrier concentrations in the channel region are highly susceptible to uncontrollable process variations.
This severe manufacturing problem may be appreciated by consideration of
FIGS. 7A and 7B
which illustrate the implantation of a P type body region
1
below an N type region
2
using a spacer
3
which serves to define the channel
4
. The ideal situation is illustrated in
FIG. 7A
corresponding to a perfectly vertical sidewall of spacer
3
with the P layer
1
situated below the N type layer
2
with a peak concentration indicated by the horizontal dashed line. (The vertical profile of the P implant will typically have a Gaussian distribution with the dashed line in
FIG. 7A
corresponding to the peak of the Gaussian curve.) This perfectly vertical sidewall of spacer
3
is never achieved in practice, however, and instead a sloped sidewall is inevitably produced. This situation is illustrated in FIG.
7
B. As may be appreciated by inspection of
FIG. 7B
, the sloped sidewall of the spacer
3
inevitably affects the penetration of the implant at the edge of the spacer region pulling the peak P dopant concentration up toward the surface as illustrated by the dashed line in FIG.
7
B. As may be seen, this pulls the P region into the N type channel region affecting the threshold voltage and V
f
of the device.
It will be appreciated from
FIG. 7B
that a variation in the slope of the sidewall spacer
3
will horizontally move the region where the peak P concentration reaches the surface. Since the degree of verticality of the sidewall spacer
3
cannot be precisely controlled, this creates uncontrollable variations in the device characteristics. Furthermore, increasing the N type concentration in the contact region to reduce the on resistance of the device exacerbates the variability of the doping concentrations in the channel due to the interaction of the N++ contact region and the P concentration which has been pulled to the surface in the unpredictable manner illustrated in FIG.
7
B. Accordingly, the problems of the high on resistance and the unpredictability of
Chang Paul
Chern Geeng-Chuan (aka Michael)
Hsueh Wayne Y. W.
Rodov Vladimir
APD Semiconductor, Inc.
Loke Steven
Myers Dawes & Andras
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