Discrete cosine transform chip using neural network concepts for

Details Discrete cosine transform chip using neural network concepts for Discrete cosine transform chip using neural network concepts for

1991-02-22

1992-11-24

Nguyen, Long T.

Boots, shoes, and leggings

G06F 738

Patent

active

051668963

ABSTRACT:
A discrete cosine transform chip includes circuits using neural network concepts that have parallel processing capability as well as conventional digital logic circuits. In particular, the discrete cosine transform chip includes a cosine term processing portion, a multiplier, an adder, a subtractor, and two groups of latches. The multiplier, the adder and the subtractor incorporated in the discrete cosine transform chip use unidirectional feed back neural network models.

REFERENCES:
patent: 4829465 (1989-05-01), Knauer et al.
patent: 4831574 (1989-05-01), Duhamel
Azriel Rosenfield et al. Digital Picture Processing, Second Edition, vol. 1, 1982, pp. 150-161.
Hong-rak Kim, Implementation of CMOS Adder and Subtracter Based on Neural Networks, Dept. of Electronic Engineering, College of Engineering, Kyungpook National University, Aug. 1989, pp. 152-165.
Jong-oh Parket et al, A Simple Discrete Cosine Transform Systolic Array Based on DFT for Video Code C, Nov. 1989, Korea.

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