Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2005-12-06
2005-12-06
Iqbal, Nadeem (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S727000
Reexamination Certificate
active
06973588
ABSTRACT:
An architecture for updating corrupted instructions in a computing device. The computing device includes a housing for enclosing a flash memory for storing a boot loader routine, and at least one boundary-scan device internal to the computing device for processing the boot loader routine, and operatively disposed on a boundary-scan bus. The housing includes a boundary-scan port through which updated instructions are communicated and power provided. The port is concealed under a label, cover, or in a location that limits access by the device owner, such as the battery well.
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International Search Report, PCT/US03/35764, mailed Mar. 31, 2004.
DeMeo Dana C.
Stern David
Wulff Thomas
Amin & Turocy LLP
Iqbal Nadeem
Symbol Technologies Inc.
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