Disabling sense amplifier

Details Disabling sense amplifier Disabling sense amplifier

1994-08-31

1995-12-05

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Differential sensing

36518902, 36523003, 365207, 327 51, 327 52, 327 53, G11C 700

Patent

active

054735670

ABSTRACT:
A memory system that includes a memory array having at least two pairs of data lines, first and second data lines that correspond to columns in the memory array. The memory array also includes two disabling sense amplifier circuits, a first disabling sense amplifier circuit connected to the first data lines and a second disabling sense amplifier circuit connected to the second data lines, wherein the disabling sense amplifier circuits produce output signals and may be enabled and disabled. A selection signal is provided for selectively enabling and disabling the disabling sense amplifier circuits, wherein one pair of data lines may be selected. An amplification circuit connected to the disabling sense amplifier circuits provides for amplifying the output signals from the disabling sense amplifier circuits.

REFERENCES:
patent: 4954987 (1990-09-01), Auvinen
patent: 5051954 (1991-09-01), Toda

Affiliated with

Also associated with

Rating

Disabling sense amplifier does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Disabling sense amplifier, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Disabling sense amplifier will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1378963