Disabling a decoder for a defective element in an integrated cir

Static information storage and retrieval – Read/write circuit – Bad bit

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36523006, G11C 700, G11C 800

Patent

active

061153028

ABSTRACT:
A circuit and method are provided for disabling a defective normal element using a flip-flop. The flip-flop has two states. In a first state, to which the flip-flop can be set on application of power, the flip-flop enables a normal decoder, corresponding to the normal element, to respond to a respective address for the normal element. In a second state, to which the flip-flop can be set only upon coincident selection of a defective normal element and a programmed redundant element during an initialization routine, the flip-flop disables the normal decoder from responding to any address.

REFERENCES:
patent: 4547867 (1985-10-01), Reese et al.
patent: 5343429 (1994-08-01), Nakayama et al.
patent: 5345110 (1994-09-01), Renfro et al.
patent: 5566128 (1996-10-01), Magome
patent: 5572471 (1996-11-01), Proebsting
patent: 5576999 (1996-11-01), Kim et al.

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