Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1999-04-07
2000-09-05
Phan, Trong
Static information storage and retrieval
Read/write circuit
Bad bit
36523006, G11C 700, G11C 800
Patent
active
061153028
ABSTRACT:
A circuit and method are provided for disabling a defective normal element using a flip-flop. The flip-flop has two states. In a first state, to which the flip-flop can be set on application of power, the flip-flop enables a normal decoder, corresponding to the normal element, to respond to a respective address for the normal element. In a second state, to which the flip-flop can be set only upon coincident selection of a defective normal element and a programmed redundant element during an initialization routine, the flip-flop disables the normal decoder from responding to any address.
REFERENCES:
patent: 4547867 (1985-10-01), Reese et al.
patent: 5343429 (1994-08-01), Nakayama et al.
patent: 5345110 (1994-09-01), Renfro et al.
patent: 5566128 (1996-10-01), Magome
patent: 5572471 (1996-11-01), Proebsting
patent: 5576999 (1996-11-01), Kim et al.
LandOfFree
Disabling a decoder for a defective element in an integrated cir does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Disabling a decoder for a defective element in an integrated cir, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Disabling a decoder for a defective element in an integrated cir will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2219433