Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2008-05-06
2008-05-06
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07370295
ABSTRACT:
The time and computational resources needed to evaluate the potential input parameter settings in a design space is decreased by determining probabilities of improvement for input parameter settings in the design space and eliminating input parameter values that have low probabilities of improvement from the design space prior to compilation. The probability of improvement for input parameter settings is an estimate of the likelihood that the compilation of the user design using the set of input parameter settings will improve the performance of the user design with respect to one or more design goals, such as timing, power, or resource usage. The probability of improvement for input parameter settings can be determined from an analysis of the compilation results of sample designs, from attributes and/or constraints of the user design, and/or from a correlation between the results of optimization algorithms applied to the user design.
REFERENCES:
patent: 6446239 (2002-09-01), Markosian et al.
patent: 6449761 (2002-09-01), Greidinger et al.
patent: 7181703 (2007-02-01), Borer et al.
Borer Terry
Chesal Ian
Altera Corporation
Siek Vuthe
Townsend and Townsend / and Crew LLP
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