Direct synthesis clock generation circuits and methods

Details Direct synthesis clock generation circuits and methods Direct synthesis clock generation circuits and methods

2006-08-15

2006-08-15

Burd, Kevin (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S373000, C341S144000, C341S147000, C708S271000

Reexamination Certificate

active

07092476

ABSTRACT:
A clock generator includes input circuitry for receiving an input signal and generating a memory address therefrom. A memory stores digital data indexed by the memory address which represents at least a portion of an analog clock. A digital to analog converter converts data retrieved from the memory to generate the analog clock which is then filtered by a filter and then converted into digital output clock.

REFERENCES:
patent: 4951004 (1990-08-01), Sheffer et al.
patent: 5563535 (1996-10-01), Corry et al.
patent: 5859605 (1999-01-01), Raghavan et al.
patent: 5931891 (1999-08-01), Landry
patent: 6075474 (2000-06-01), Gabet et al.
patent: 6483388 (2002-11-01), Khan
patent: 6515526 (2003-02-01), Dairi

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