Direct memory access unit having a definable plurality of transf

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing

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710 72, G06F 1314

Patent

active

059448008

ABSTRACT:
Th present invention relates to a DMA-controller having a definable plurality of transfer channels. According to the present invention such a unit comprises a data processing unit with a bus interface unit being coupled with a bus for transferring data. The data processing unit executes a data transfer on said bus dependent on programmable parameters. It further comprises a parameter memory storing those parameters for each transfer channel, whereby the parameter memory provides a first memory area which stores for each defined transfer channel a word comprising a vector address to a second memory area comprising specific parameters for said transfer channel.

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