Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1999-03-26
2001-10-09
Lefkowitz, Sumati (Department: 2181)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S022000, C710S120000
Reexamination Certificate
active
06301632
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of electrical system bus protocol bridges. More particularly, the present invention relates to a bridge system and method to provide a PCI master direct access to memory associated with another component, such as memory associated with a Hitachi SH4 microprocessor.
BACKGROUND OF THE INVENTION
Electronic systems and circuits have made a significant contribution towards the advancement of modern society and are utilized in a number of applications to achieve advantageous results. Electronic technologies such as digital computers, calculators, audio devices, video equipment and telephone systems have facilitated increased productivity and reduced costs in analyzing and communicating data, ideas and trends in most areas of business, science, education and entertainment. Frequently, electronic systems designed to provide these results include a variety of components that need access to memory capable of storing information related to their functions.
Typically, the components of an electrical system require access to memory before information can be stored or retrieved. For example, microprocessors need access to a memory before they can retrieve program instructions and information related to an application from the memory. In addition to microprocessors, other components attached to or included in an application specific integrated circuit (ASIC) usually require access to memory. For example, audio devices need memory to store wavetable samples and modem devices require memory resources to hold communication data. Universal serial bus (USB) utilizes memory to retain link lists of functions it should perform and IEEE 1394 compliant systems (e.g., Firewire™) have registers that need to be maintained in a memory. This is just a partial list of the variety of electronic components that typically require memory capacity to perform a specific function.
Electronic systems typically rely on external memories to supply sufficient memory capacity for each component to perform their functions. External memories are usually either coupled directly to an electronic component (e.g., graphics memory is coupled directly to graphics chipset) or the memories are coupled to a system ASIC. Providing each component with its own external memory coupled directly to the component and/or coupling the memory to a system ASIC adds significant additional costs and inefficiencies to a system. Some components do not require large amounts of memory and significant resources are wasted on excess memory capacity if each component is provided with its own dedicated and directly coupled memory. In electronic systems with external memory coupled to a system ASIC, additional pins are required on the ASIC to handle the communications with the memory. The additional pins increase the cost of design and manufacture of the chip. Many of the additional costs and inefficiencies would be eliminated if one component could have direct access to another component's memory.
Differences in internal bus protocols of the components in an electrical system usually prevent a component from getting direct access to a memory coupled directly to another component. For example, virtually all electronic systems that include a microprocessor also include a main memory that has sufficient capacity to store information related to other components. However, the memory typically operates on the same protocol as its associated microprocessor and is usually different from the internal bus protocols of the other components. Thus, components other than the microprocessor of a microprocessor based application specific system, usually can not directly access a main memory.
The inability of one component to access a memory coupled directly to another component is even more pronounced in electronic systems in which one of the components utilizes new technology. In these situations, there usually are no component interfaces capable of connecting the internal buses of an ASIC and a new microprocessor. For example, in a situation where a microprocessor includes a memory controller that utilizes a new data transfer protocol and an internal ASIC bus is a PCI bus, the two components would typically not be able to communicate and the system ASIC would not have the ability to control direct memory accesses. The microprocessor operates on its own data transfer protocol which is different from PCI protocol. There would be no microprocessor interface to convert the data transfer protocol of the microprocessor to PCI protocol.
What is required is a bridge system and method that translates messages in one protocol into another protocol and permits one component to have direct access to another component's memory. The bridge system and method should not have to rely on each component having its own specific bridge interface with a memory component. It should permit a system to be built with fewer individual memory components than systems and methods with individual memory components for each device, smaller pin counts for system chips such as an ASIC, and designs that are more economical while still providing enough performance for most systems. For example, a system and method is needed that enables a master inside a system ASIC chip to have read and write access to a main memory associated with a microprocessor coupled to the system ASIC chip. In addition, the system and method should provide an interface capable of translating between an ASIC bus operating in a PCI protocol environment and a microprocessor with a different data transfer protocol.
SUMMARY OF THE INVENTION
The present invention is a method and system for a direct memory access bridge system and method that translates messages in one protocol into another protocol and permits one component to have direct access to another component's memory. The direct memory access bridge system and method does not have to rely on each component having its own specific interface to a memory component. It permits a system to be built with fewer individual memory components than prior art systems and methods, smaller pin counts for the system ASIC, and permits systems designs that are more economic in comparison to the prior art while still providing enough performance for most systems. For example, one embodiment of a direct memory access bridge system and method of the present invention permits a master inside a system ASIC chip to have read and write access to a main memory associated with a microprocessor coupled to the system ASIC chip. It also provides an interface capable of translating between a Hitachi SH4 microprocessor with a demand data transfer protocol and internal ASIC PCI bus.
In one embodiment, the present invention comprises a direct memory access bridge for translating messages between PCI protocols and SH4 protocols. The direct memory access bridge includes a PCI interface and an SH4 interface coupled to each other. The PCI interface is adapted to couple to a PCI bus and the SH4 interface is adapted to couple to an SH4 protocol bus. The PCI interface is adapted to transmit and receive data and fundamental message information to and from PCI devices coupled to the PCI bus (e.g., in accordance with PCI protocols). Fundamental message information includes information required to make conversions from one protocol to another, such as the address in the memory to which the data is bound and the amount of data that was received. The SH4 interface is adapted to transmit and receive the data and the fundamental message information to and from an SH4 microprocessor and memory coupled to the SH4 bus (e.g., in accordance with SH4 protocols). The SH4 interface and the PCI interface transform the data and fundamental message information from the PCI protocol to the SH4 protocol and transfer the data and the fundamental message information from the PCI bus to the SH4 protocol bus. Similarly, the SH4 interface and the PCI interface transform the data and fundamental message information from the SH4 protocol to the PCI protocol a
Lefkowitz Sumati
VLSI Technology Inc.
Wagner , Murabito & Hao LLP
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