Direct memory access (DMA) via separate bus utilizing a buffer f

Details Direct memory access (DMA) via separate bus utilizing a buffer f Direct memory access (DMA) via separate bus utilizing a buffer f

1997-06-26

1999-09-28

Lee, Thomas C.

Electrical computers and digital data processing systems: input/

Input/output data processing

Direct memory accessing

710 28, G06F 1314

Patent

active

059580259

ABSTRACT:
To increase access speed, a single-chip computer system having a direct memory access (DMA) mode, includes a central processing unit (CPU) for executing instructions, a first bus connected to the CPU, a memory array connected to the first bus, for storing data, a buffer connected to the first bus, a second bus connected to the buffer, and a communication circuit, connected to the second bus, for receiving and outputting data. The buffer connects the first bus to the second bus when the DMA mode is executed, and disconnects the first bus from the second bus when the DMA mode is not executed.

REFERENCES:
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patent: 4665483 (1987-05-01), Ciacci et al.
patent: 4935868 (1990-06-01), Dulac
patent: 4975832 (1990-12-01), Saito et al.
patent: 5546568 (1996-08-01), Bland et al.
patent: 5692201 (1997-11-01), Yato

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