Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2009-12-10
2010-10-05
Lane, Jack A (Department: 2185)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S206000
Reexamination Certificate
active
07809923
ABSTRACT:
In an embodiment, an input/output (I/O) memory management unit (IOMMU) comprises at least one memory configured to store translation data; and control logic coupled to the memory and configured to translate an I/O device-generated memory request using the translation data. The translation data corresponds to one or more device table entries in a device table stored in a memory system of a computer system that includes the IOMMU, wherein the device table entry for a given request is selected by an identifier corresponding to the I/O device that generates the request. The translation data further corresponds to one or more I/O page tables, wherein the selected device table entry for the given request includes a pointer to a set of I/O page tables to be used to translate the given request.
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Alsup Mitchell
Haertel Michael
Hummel Mark D.
Lueck Andrew W.
Strongin Geoffrey S.
GLOBALFOUNDRIES Inc.
Lane Jack A
Merkel Lawrence J.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
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