Direct memory access controller including first and second...

Details Direct memory access controller including first and second... Direct memory access controller including first and second...

2007-05-18

2009-10-13

Chen, Alan (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Direct memory accessing

C710S023000, C710S026000, C710S028000

Reexamination Certificate

active

07603489

ABSTRACT:
DMAC includes current transfer setting registers and next transfer setting registers. Each of the current transfer setting registers stores transfer source address, transfer destination address and transfer count. The next transfer setting registers stores a transfer setting of a DMA transfer carried out after completing a DMA transfer according to a current transfer setting stored in the current transfer setting registers as a next transfer setting. Further, flags are provided for controlling to write to each of the next transfer setting registers.

REFERENCES:
patent: 6202106 (2001-03-01), Baxter
patent: 6701405 (2004-03-01), Adusumilli et al.
patent: 8-278938 (1996-10-01), None
patent: 2000-20455 (2000-01-01), None

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