Direct memory access apparatus for transferring a block of data

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing

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710 24, 710 55, 711206, 711209, 345526, G06F 1314

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active

06108722&

ABSTRACT:
A method and arrangement for a dma transfer mode having multiple transactions is provided. The invention generates a set of transaction entries for a DMA transfer each of which contains information related to the address and command instruction of a transaction. The transaction entries are stored in an address/cmd-output-FIFO. The invention negotiates for the control of the system bus. Upon gaining control of the bus, the commands and address relate to each transaction are sequentially place on the system bus. If the transaction is a read operation, data received back from the system bus is first stored in a data-in-FIFO before being sent to the desired destination. If the transaction is a write operation, the data to be transferred is first stored in a data-out-FIFO before being timely place on the system bus for transferring to the desired destination. In either case, the number of data words transferred is monitored to determine when a transaction is complete. The number of transactions carried out is also monitored to determine when a DMA transfer is complete.

REFERENCES:
patent: 5251303 (1993-10-01), Fogg, Jr. et al.
patent: 5295246 (1994-03-01), Bischoff et al.
patent: 5430853 (1995-07-01), Arakawa
patent: 5649230 (1997-07-01), Lentz
patent: 5655090 (1997-08-01), Weingart
patent: 5802546 (1998-09-01), Chisholm et al.

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