Direct imprinting of etch barriers using step and flash...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S641000, C438S654000

Reexamination Certificate

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10995800

ABSTRACT:
A direct imprinting process for Step and Flash Imprint Lithography includes providing (40) a substrate (12); forming (44) an etch barrier layer (14) on the substrate; patterning (46) the etch barrier layer with a template (16) while curing with ultraviolet light through the template, resulting in a patterned etch barrier layer and a residual layer (20) on the substrate; and performing (48) an etch to substantially remove the residual layer. Optionally, a patterning layer (52) may be formed on the substrate (12) prior to forming the etch barrier layer (14). Additionally, an adhesive layer (13) may be applied (42) between the substrate (12) and the etch barrier layer (14).

REFERENCES:
patent: 6334960 (2002-01-01), Wilson et al.
patent: 6387787 (2002-05-01), Mancini et al.
patent: 6576374 (2003-06-01), Kim
patent: 2003/0142486 (2003-07-01), Arakawa et al.
patent: 2004/0224261 (2004-11-01), Resnick et al.
S.C. Johnson et al., “Advanced in Step and Flash Imprint Lithography”, Proceedings of SPIE, vol. 5037 (2003) pp. 197-202.
Matthew Colburn, et al., “Step and Flash Imprint Lithography for sub-100nm Patterning,” Proceedings of SPIE, vol. 3997, pp. 453-457.

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