Direct I/O device access by a virtual machine with memory...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing

Reexamination Certificate

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C710S001000, C710S002000, C710S003000, C710S004000, C710S005000, C710S006000, C710S007000, C710S008000, C710S009000, C710S010000, C710S011000, C710S012000, C710S013000, C710S014000, C710S015000, C710S016000, C710S017000, C710S018000, C710S019000, C710S020000, C710S021000, C710S023000, C710S036000, C710S056000, C710S058000, C710S065000, C710S308000

Reexamination Certificate

active

08086765

ABSTRACT:
Illustrated is a system and method for identifying a memory page that is accessible via a common physical address, the common physical address simultaneously accessed by a hypervisor remapping the physical address to a machine address, and the physical address used as part of a DMA operation generated by an I/O device that is programmed by a VM. It also includes transmitting data associated with the memory page as part of a memory disaggregation regime, the memory disaggregation regime to include an allocation of an additional memory page, on a remote memory device, to which the data will be written. It further includes updating a P2M translation table associated with the hypervisor, and an IOMMU translation table associated with the I/O device, to reflect a mapping from the physical address to a machine address associated with the remote memory device and used to identify the additional memory page.

REFERENCES:
patent: 7996569 (2011-08-01), Aloni et al.
patent: 2005/0246453 (2005-11-01), Erlingsson et al.
patent: 2007/0162572 (2007-07-01), Aloni et al.
patent: 2007/0162619 (2007-07-01), Aloni et al.
patent: 2007/0244972 (2007-10-01), Fan
patent: 2008/0133709 (2008-06-01), Aloni et al.

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