Direct coupled FET logic translator circuit

Electronic digital logic circuitry – Interface – Supply voltage level shifting

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Details

326117, H03K 190175

Patent

active

054518881

ABSTRACT:
A semiconductor circuit for converting high and low input signals at first and second voltage levels to high and low output signals at third and fourth voltage levels includes first, second, and third power supply lines receiving driving voltages at first, second, and third voltages, respectively, the third voltage being intermediate the first and second voltages, a first logic circuit connected to and driven by the first and third power supply lines for receiving high and low input signals at first and second voltage levels and producing output signals in response, a second logic circuit connected to and driven by the second and third power supply lines for receiving input signals and producing high and low output signals at third and fourth voltage levels in response, a level converting circuit connected to and driven by the first and second power supply lines, receiving the output signals of the first logic circuit and supplying input signals to the second logic circuit, a switching element and a load element connected in series and to the first and second power supply lines, the junction of the switching and load elements being connected to the second logic circuit, the switching element being connected to and controlled by the first logic circuit, and a clamping circuit connected in parallel with the load element in order to operate at high speed.

REFERENCES:
patent: 4707622 (1987-10-01), Takeo
patent: 4743782 (1988-05-01), Nelson
patent: 4897565 (1990-01-01), Shimizu
patent: 5043607 (1991-08-01), Danckaert
patent: 5107144 (1992-04-01), Hiryama
patent: 5159208 (1992-10-01), Kaneko

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