Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2006-05-02
2006-05-02
Sparks, Donald (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C709S215000
Reexamination Certificate
active
07039769
ABSTRACT:
In a computer system in which a plurality of hosts is connected through an interconnection network, an apparatus coupled to the interconnection network for allowing the plurality of hosts to share a collection of memory sectors, the memory sectors storing compressed data, is provided. The apparatus includes a network adapter for coupling the apparatus to the interconnection network; a memory for storing the collection of memory sectors; and control logic for managing the memory, the control logic including a memory compressor/decompressor. The memory further includes a directory for translating real addresses of at least one host to an address in the apparatus. A method for managing a number of memory sectors used by each host and a method for translating a real address specified by at least one host into a real address of the apparatus is also provided.
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P.A. Franaszek, et al., Algorithms and Data Structures for Compressed-Memory Machines, IBM J & Dev. vol. 45 No. 2, Mar., 2001, pp. 245-258.
Castelli Vittorio
Franaszek Peter A.
Heidelberger Philip
Robinson John Timothy
F. Chau & Associates LLC
Rutz Jared
Sparks Donald
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