Diode coupled CMOS logic design for quasi-static resistive dissi

Details Diode coupled CMOS logic design for quasi-static resistive dissi Diode coupled CMOS logic design for quasi-static resistive dissi

1993-12-30

1995-06-06

Hudspeth, David R.

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

326136, H03K 14096

Patent

active

054225825

ABSTRACT:
CMOS logic circuitry powered by the clock signals wherein the addition of strategically placed diodes enables the circuits to behave in an adiabatic-like fashion.

REFERENCES:
patent: 3651340 (1972-03-01), Cliff
patent: 3808462 (1974-04-01), Parrish et al.
patent: 4142251 (1979-01-01), Mintz
Younis & Knight, "Practical Implementation of Change Recovering Asympfatically Zero Power CMOS", paper presented at MIT, Oct. 9, 1992.
Roderick T. Hinman and Martin F. Schlecht, "Recovered Energy Logic-A Highly Efficient Alternative to Today's Logic Circuits", PESC 1993, pp. 17-26.
Charles L. Seitz, Alexander H. Frey, Sven Mattisson, Steve D. Rabin, Don A. Speck and Jan L. A. van de Snepscheut, "Hot-Clock nMOS", in Proceedings of the 1985 Chapel Hill Conference on Very Large Scale Integration, Computer Science Press, 1985, pp. 1-17.
Jeffery G. Koller and William C. Athas, "Adiabatic Switching, Low Energy Computing, and the Physics of Storing and Erasing Information", in Proceedings of Physics of Computation Workshop, 1992.

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