Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1997-09-04
1998-11-10
Le, Vu A.
Static information storage and retrieval
Read/write circuit
Bad bit
3652257, 365 63, G11C 700
Patent
active
058354255
ABSTRACT:
Disclosed is a repairable semiconductor memory array. The repairable semiconductor memory array includes a main memory array 210. A set of redundant rows 212 and a set of redundant columns 214 for repairing a row element or a column element of the main memory array. A fusebank group 216 that is electrically wired to the set of redundant rows and the set of redundant columns. The repairable semiconductor memory array further includes a plurality of fusebanks 218 contained within the fusebank group. Each of the plurality of fusebanks are programmable to address the column element or the row element of the main memory array, and the addressed column element or row element being replaced with one of the set of redundant rows or one of the set of redundant columns.
REFERENCES:
patent: 5465234 (1995-11-01), Hannai
patent: 5487040 (1996-01-01), Sukegawa et al.
patent: 5633826 (1997-05-01), Tsukada
Braden Stanton C.
Le Vu A.
Siemens Aktiengesellschaft
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