Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-07-15
2010-11-02
Rossoshek, Helen (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C714S726000, C714S731000, C714S742000, C714S746000
Reexamination Certificate
active
07827509
ABSTRACT:
The present invention provides a method for digitally obtaining contours of fabricated polygons. A GDS polygon described in a Geographic Data System (GDS) file is provided. Based on the GDS polygon, a plurality of identical polygons is fabricated with the same fabrication process such that shapes of the plurality of identical polygons are altered by optical effects in the same or similar way. The plurality of identical polygons forms poly-silicon gates of a plurality of test transistors. The position of source and drain islands along a length of a poly-silicon gate for each of the plurality of test transistors is different. Using Automated Test Equipment (ATE), a digital test is performed on a circuit including the plurality of test transistors to obtain test responses, the test responses being raw digital data. The test responses may be displayed in a histogram reflecting a contour of the plurality of identical polygons or post-processed to reconstruct a contour of the plurality of identical polygons.
REFERENCES:
patent: 6167555 (2000-12-01), Lakos
patent: 6174741 (2001-01-01), Hansch et al.
patent: 6625611 (2003-09-01), Teig et al.
patent: 6711732 (2004-03-01), Dai et al.
patent: 6886153 (2005-04-01), Bevis
patent: 6996793 (2006-02-01), Kronmiller et al.
patent: 7206983 (2007-04-01), Alyamani et al.
patent: 7269816 (2007-09-01), Bevis
patent: 7549142 (2009-06-01), Alvarez-Gomariz et al.
patent: 2008/0206905 (2008-08-01), Schaller et al.
patent: 2009/0218600 (2009-09-01), Park et al.
Mah et al.; “Quantitative analysis of mask misalignment and its effect on device performance”; Publication Year: 1990; Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1990. Technical Digest 1990., 12th Annual; pp. 313-315.
LSI Corporation
Rossoshek Helen
Suiter Swantz pc llo
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