Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1993-12-21
1996-01-16
Chin, Stephen
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
331 4, 331 15, 331 25, 331DIG2, 327 43, 327 5, 375327, 375328, 375371, H03D 324
Patent
active
054854849
ABSTRACT:
A bit synchronizing circuit is provided with both analog and digital devices in an enhanced bit synchronizing circuit system. There is provided a digital phase detector and a digital lock detector which are compatible with analog circuity. The output of the digital phase detector is coupled to an analog summing circuit having an output which is coupled to a low pass filter (LPF). The analog output of the LPF is coupled to the input of a voltage controlled oscillator (VCO) which produces a data rate clock. The output of the digital lock detector is coupled to an analog summing circuit having an output coupled to a low pass filter (LPF). The output of the LPF is coupled to a comparator for generating a lock indication signal output. The output of the comparator is also coupled to a sweep circuit which is coupled to an input of the voltage controlled oscillator for resolving frequency uncertainties in the bit synchronizing circuit.
REFERENCES:
patent: 4419760 (1983-12-01), Bjornhalt
patent: 4617520 (1986-10-01), Lenne
patent: 4780893 (1988-10-01), Henkelman, Jr.
patent: 4837781 (1989-06-01), Huckling
patent: 5121071 (1992-06-01), Kelly et al.
patent: 5233636 (1993-08-01), Lee et al.
patent: 5301196 (1994-04-01), Ewen et al.
patent: 5313499 (1994-05-01), Coburn
Arbanas Glenn A.
Greeff Roy E.
Williams Bruce H.
Chin Stephen
Le Amanda T.
Sowell John B.
Starr Mark T.
Unisys Corporation
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