Digital voltage translator and its method of operation

Details Digital voltage translator and its method of operation Digital voltage translator and its method of operation

1998-06-26

2000-02-01

Tokar, Michael

Electronic digital logic circuitry

Interface

Supply voltage level shifting

326 57, 326 68, H03K 190185

Patent

active

060207620

ABSTRACT:
A signal translator circuit for particular use with low level logic signals is designed to accept a low level transitioning signal in a lower voltage range and output a signal transitioning within a higher voltage range. Circuitry is provided to ensure proper operation even at very low voltages. The circuitry which ensures proper operation at low voltages is selectively enabled when low input voltage input signals are used. In addition, the output signal is selectively disabled to allow downstream circuits to conserve energy during power up and power down cycles.

REFERENCES:
patent: 4897567 (1990-01-01), Bacrania
patent: 5406142 (1995-04-01), Nakamara et al.
patent: 5736869 (1998-04-01), Wei
patent: 5786711 (1998-07-01), Choi
patent: 5883538 (1999-03-01), Keeth et al.
PAL Platform Architecture Lab, 250 Mhz Voltage Scaleable CMOS Input Buffer, A solution to support the BSRAM industry transition from 2.5 to 1.8 Volts, Intel Platform Architecture Lab Mar. 12, 1996.

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