Digital TV receivers with poly-phase analog-to-digital conversio

Television – Receiver circuitry

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348 21, 375350, H04N 5455, H04N 908

Patent

active

058524770

ABSTRACT:
A digital television signal receiver includes, instead of a single flash converter as in the prior art, MN analog-to-digital converters of successive binary approximation type sampling baseband symbol coded signal on an MN-phase basis to provide a respective digital output signal, each of which sampling phases is of one-M.sup.th symbol time duration, M being a positive integer at least one and N being a positive integer more than one. In a digital television signal receiver for ATSC standard signals, N is twelve. Equalization filtering is carried forward on an MN-phase basis, with output signals from N of the phases being supplied to N trellis decoders as their respective input signals. Selecting M to be two facilitates symbol synchronization using first and second N-phase match filters for a prescribed pseudo-noise sequence in the data field synchronization codes. The first match filter responds to the digital output signals of the oddly ordinally numbered ones of the 2N analog-to-digital converters as equalized by the 2N-phase equalization filter; and the second match filter responds to the digital output signals of the evenly ordinally numbered ones of the 2N analog-to-digital converters as equalized by the 2N-phase equalization filter. A symbol synchronizer responds to differences in those match filter responses for adjusting the phase of sampling by the 2N analog-to-digital converters of successive binary approximation type.

REFERENCES:
patent: 5636251 (1997-06-01), Citta et al.
patent: 5648822 (1997-07-01), Hulyalkar
patent: 5717471 (1998-02-01), Stewart
patent: 5812957 (1996-04-01), Hulyalkar

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