Digital timing recovery circuit including a loop filter having a

Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data

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375376, 327156, H04L 700, H03D 324

Patent

active

056595867

ABSTRACT:
A digital timing recovery circuit for recovering a sampling clock of a playback signal in digital equipment, provides a fast phase obtaining time, reduces a phase error so as to generate a stable sampling clock and a dead zone effect caused by performing a quantization using a limited number of bits in hardware, and includes an analog-to-digital converter, a phase error detector, a phase error comparator, a loop filter, a reference voltage generator, a digital-to-analog converter and a variable voltage oscillator, to thereby reduce the phase obtaining time by varying the bandwidth of the loop filter according to the phase error size detected by the phase error detector and reduce a sampling phase error caused by noise at a constant state.

REFERENCES:
patent: 5235622 (1993-08-01), Yoshida
patent: 5255289 (1993-10-01), Tomita
patent: 5335252 (1994-08-01), Kobayashi
patent: 5490174 (1996-02-01), Shin et al.

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