Digital signal sampler

Data processing: measuring – calibrating – or testing – Testing system – Signal generation or waveform shaping

Reexamination Certificate

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Details

C702S079000, C702S089000, C702S176000

Reexamination Certificate

active

07096144

ABSTRACT:
A sampling circuit for testing an integrated circuit receives several signals from points of interest in the integrated circuit, digitizes them, and determines whether the digitized signal is above or below a threshold. By sampling the signal at different phases of a system clock signal, a determination can be made of when during the system clock signal the signal at a point of interest changed state. Circuits are provided for making minimal impact on the circuit being observed. Circuits are also provided for clocking the observed signal so that it can be compared to other observed signals.

REFERENCES:
patent: 2004/0173003 (2004-09-01), Ibane
Ron Ho, et al., “Applications of On-Chip Samplers for Test and Measurement of Integrated Circuits,” 1998 Symposium on VLSI Circuits Digest of Technical Papers, pp. 138-139.
T. Mori, et al. “A 1V 0.9mW at 100MHz 2kx16b SRAM utilizing a Half-Swing Pulsed-Decoder and Write-Bus Architecture in 0.25um Dual-Vt CMOS,” ISSCC, 1998, pp. 22.4-1 to 22.4-10.
P. Larsson and C. Svensson, “Measuring high-bandwidth signals in CMOS circuits,” Electronics Letters, vol. 29, No. 20, 1993, pp. 1761-2.

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