Digital signal processor suited for LSI fabrication

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364724, 364726, G06F 1531

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active

044070187

ABSTRACT:
A digital signal processor is disclosed suited for LSI fabrication comprising a data input circuit for carrying out scaling on a plurality of serial data supplied through a first external terminal group; a coefficient input circuit for carrying out 2's complement conversion on a plurality of specific data from a plurality of serial data supplied through a second external terminal group; a multiplier circuit for carrying out a plurality of multiplications and additions on data from the data input and coefficient input circuits; and an adder circuit for carrying out a plurality of additions and subtractions as well as overflow detection and correction. Data connections in each of the circuits are altered depending on a combination of logical zeros and ones entered through a fourth external terminal group so that one of a plurality of functional modes is selected.

REFERENCES:
patent: 4020334 (1977-04-01), Powell et al.
patent: 4128890 (1978-12-01), Irwin et al.
patent: 4157589 (1979-06-01), Kapral et al.
patent: 4255794 (1981-03-01), Nakayama
"Special Purpose Hardware for Digital Filtering", by S. K. Freeny, Proceedings of the IEEE, vol. 63, No. 4, Apr. 1975, pp. 663-648, particularly, FIG. 16 on p. 643.
"Multiplier-Accumulator Application Notes", by L. Schirm IV, TRW LSI Products, Jan. 1980, pp. 7-9, particularly FIG. 8, FIG. 11 and FIG. 13.
"An Approach to the Implementation of Digital Filters", by L. B. Jackson et al., IEEE Transactions on Audio and Electrocaustics, vol. AU-16, No. 3, Sep. 1968, pp. 413-421, particularly FIG. 8 on p. 416.

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